Yiting Wang's picture

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Yiting Wang

Nellyw888

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https://github.com/NellyW8

NellyW8

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Recent Activity

upvoted a paper about 1 month ago

SymRTLO: Enhancing RTL Code Optimization with LLMs and Neuron-Inspired Symbolic Reasoning

updated a model about 1 month ago

Nellyw888/verilog-multiturn-2b

published a model about 1 month ago

Nellyw888/verilog-multiturn-2b

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upvoted a paper about 1 month ago

SymRTLO: Enhancing RTL Code Optimization with LLMs and Neuron-Inspired Symbolic Reasoning

Paper • 2504.10369 • Published Apr 14 • 2

upvoted a paper about 2 months ago

VeriReason: Reinforcement Learning with Testbench Feedback for Reasoning-Enhanced Verilog Generation

Paper • 2505.11849 • Published May 17 • 2

upvoted a collection 3 months ago

Verireason

Dataset and Model for paper: "VeriReason: Reinforcement Learning with Testbench Feedback for Reasoning-Enhanced Verilog Generation" • 9 items • Updated Jun 6 • 1